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352'8&7,1)250$7,21 copyright ? cirrus logic, inc. 1999 (all rights reserved) 2-, 4-, or 8-channel, 16/24-bit buffered ds multi-range adc the following information is based on the technical data sheet: cs5521/23 ds317pp2 mar 99 cs5522/24/28 ds265pp3 mar 99 please contact cirrus logic for further information. cs5521/22/23/24/28 pi317pp3 apr 99 5521pi_3.fm page -1 monday, april 12, 1999 12:03 pm
sales office and applications support contacting cirrus logic support for a complete listing of direct sales, distributor, and sales representative contacts, visit the cirrus logic web site at: www.cirrus.com for further information on cirrus logic products, please visit our website www.cirrus.com or call our literature department (800) 888-5016 ext. 3594 or (512) 912-3594 for data sheets and application notes. 5521pi_3.fm page 0 monday, april 12, 1999 12:03 pm
pi317pp3 apr 99 1 cs5521/22/23/24/28 features 2-, 4-, or 8-channel, 16/24-bit ds multi-range adc features l delta-sigma a/d converter linearity error: 0.0007%fs noise free resolution: up to 18-bits l bipolar/unipolar input ranges 25mv, 55mv, 100mv, 1v, 2.5v and 5v l chopper stabilized instrumentation amplifier l on-chip charge pump drive circuitry l differential multiplexer l conversion data fifo l programmable/auto channel sequencer l 2-bit output latch l simple three-wire serial interface spi? and microwire? compatible schmitt trigger on serial clock (sclk) l output settles in one conversion cycle l 50/60 hz 3 hz simultaneous rejection l buffered v ref with +5 v input capability l system and self-calibration with r/w registers per channel l single +5 v analog supply +3.0 v or +5 v digital supply l low power mode consumption: 5.5 mw 5521pi_3.fm page 1 monday, april 12, 1999 12:03 pm
2 pi317pp3 apr 99 cs5521/22/23/24/28 description description the 16-bit cs5521/23 and the 24-bit cs5522/24/28 are highly integrated ds a/d converters which include an instrumentation amplifier, a pga (program- mable gain amplifier), a multi-channel multiplexer, digital filters, and self and system calibration circuitry. the chips are designed to provide their own negative supply which enables their on-chip instrumentation amplifiers to measure bipolar ground-referenced signals 100 mv. by directly supplying nbv with -2.5 v and with va+ at 5v, 2.5 v signals (with respect to ground) can be measured. the digital filters provide programmable output update rates of 1.88 hz, 3.76 hz, 7.51 hz, 15 hz, 30 hz, 61.6 hz, 84.5 hz, and 101.1 hz when operat- ing from a 32-khz crystal. the cs5521/22/23/24/28 are capable of producing output update rates up to 303 hz with a 100-khz clock. the filters are designed to settle to full accuracy for the selected output update rate within one conver- sion cycle. when operated at word rates of 15 hz or less, the digital filters reject both 50 and 60 hz line interference 3 hz simultaneously. low power, single conversion settling time, programmable output rates, and the ability to handle negative input signals make these single supply products ideal solutions for isolated and non-isolated applications. programmable gain va+ agnd vref+ vref- vd+ dgnd xin xout sdo sdi nbv latch differential digital filter calibration register control register output register 4th order ds modulator calibration memory calibration m c clock gen. sclk cs mux ain2+ + x20 x1 x1 x1 cs5524 shown ain2- ain1+ ain1- ain4+ ain4- ain3+ ain3- a0 a1 cpd 5521pi_3.fm page 2 monday, april 12, 1999 12:03 pm
pi317pp3 apr 99 3 cs5521/22/23/24/28 overview overview the cs5521/23 and cs5522/24/28 are 16-bit and 24-bit converters which in- clude a chopper-stabilized instrumentation amplifier input, and an on-chip pro- grammable gain amplifier. they are optimized for measuring low-level unipolar or bipolar signals in process control and medical applications. the cs5521/22/23/24/28 also include a fourth order delta-sigma modulator, a calibration micro-controller, eight digital filters used to select between eight output update rates, a 2-bit analog latch, a multiplexer, and a serial port. the cs5521/22/23/24/28 include a cpd (charge pump drive) output which provides a negative bias voltage to the on-chip instrumentation amplifier when used with a combination of external diodes and capacitors. this makes the con- verters ideal for thermocouple temperature measurements because the biasing scheme enables the cs5521/22/23/24/28 to measure negative voltages with respect to ground without the need for a negative supply. faqs 1) what determines the input span of the converter? a: the cs5521/22/23/24/28 provide six default input ranges. with a 2.5v reference the default ranges are 25 mv, 55 mv, 100 mv, 1 v, 2.5 v, and 5 v. the reference voltage can also be used to modify the input range. for example, if the reference voltage is reduced by 50 percent, the default input ranges scale by one half. for example, if vref = 2.5 v, then vin = is 0 v to 5 v. if vref = 1.25 v, then vin = 0 v to 1.25 v, and if vref = 5 v, then vin = 0v to 5 v. 2) can calibration be used to modify the default input ranges? a: yes, calibration can be used to modify the default input ranges. the con- verters offer system gain calibration which can be used to set the full scale input. with system gain calibration, each range can be exceeded by approximately 50 percent. further note the adcs also offer system off- set calibration. system offset calibration is used to set the zero point of the adcs transfer function. the converter can typically trim 50 per- cent of the full scale input span. 5521pi_3.fm page 3 monday, april 12, 1999 12:03 pm
4 pi317pp3 apr 99 cs5521/22/23/24/28 faqs 3) is calibration required to use the converter? a: no, calibration is not required to use the converter. if the signal to be measured is within the adcs nominally selected input range (25mv, 55mv, 100mv, 1.0v, 2.5v, 5v), the converter can perform conversions without the need for calibrations. keep in mind that errors in the system remain present when calibration is not performed, however, this may be acceptable if the errors are insignificant to the measurement or if the errors are removed by some other means, such as software. another side point is that if a factory calibration is performed using system calibration, the contents of the calibration registers can be read by the systems pro- cessor and stored in eeprom. these same calibration coefficients can then be down loaded into the calibrations registers of the adcs when power is re-applied to the system. 4) how often do i need to recalibrate? a: a good rule of thumb is to recalibrate the converter (or system) with every ten degrees of ambient temperature change. 5) how does the instrumentation amplifiers chopping frequency affect the converters input impedance and input current? a: the cs5521/22/23/24/28 provide extremely low input current and extremely high input impedance. the input impedance of the converter is a dynamic impedance and depends on whether or not the instrumentation amplifier is engaged. for the lower ranges (25 mv, 55 mv, 100 mv), the instrumentation amplifier is engaged. since the input current in the low ranges at room temperature is around 100pa and the default input range is 100mv, a typical input impedance for the 100 mv range is 1000 m w (100mv/100pa). for the higher ranges (1 v, 2.5 v, and 5 v), the instru- mentation amplifier is bypassed and coarse/fine charge buffers are acti- vated. the input current to these buffers is tens of nanoamps. for the 2.5 v input range, a typical input impedance is 250 m w ( 2.5 v/10 na). 5521pi_3.fm page 4 monday, april 12, 1999 12:03 pm
pi317pp3 apr 99 5 cs5521/22/23/24/28 faqs 6) how many conversion cycles does it take for the converter to settle a full scale step input? a: the cs5521/22/23/24/25/26/28/29 as well as the cs5504/05/06/07/08/09 family of converters are designed to settle in one conversion cycle. this makes the converters ideally suited for various input level multiplexer applications as the converters can be switched from channel to channel with every conversion while maintaining resolution and accuracy. 7) how does the output word rate affect the adcs bandwidth? a: the usable input bandwidth is 1/2 the selected output word rate. for example, with a 15 hz output word rate selected, the available input sig- nal bandwidth is 7.5 hz. 8) how does the multiplexer affect the adcs throughput? a: the cs5521/22/23/24/28 provide two, four and eight channel input mul- tiplexors. the adcs throughputs are divided equally by the number of channels each converter has. for example, lets assume an end user has designed a system that uses a cs5524 in the continuous conversion mode and the user is sequentially stepping through its four channels. with an output word rate of 15 hz, each channel would yield an effective through put of 15/4, or approximately 3.75 hz per channel. 9) what is recommended if i need more or less bandwidth than is provided by the on-chip digital filter? a: the cs5521/22/23/24/28 permit a user to use an external clock between 30 khz and 100 khz. by using a lower/higher rate clock, the output word rates as well as the filter corner frequencies scale linearly with the xin clock rate. for example, by using a 3 clock, the 15 hz default rate scales to approximately 45 hz and the input bandwidth increases to approxi- mately 23 hz. 10) can the charge pump be used to source current for an external load? a: yes, the charge pump can be used to source approximately 450 m a. applications note 146 further details systems requiring such current. 5521pi_3.fm page 5 monday, april 12, 1999 12:03 pm
6 pi317pp3 apr 99 cs5521/22/23/24/28 faqs 11) if the charge pump is engaged, how do i ensure that the converter and its external components are intrinsically safe? a: intrinsic safety prohibits the use of electrolytic (or bipolar) capacitors thus limiting the use of certain size capacitors. although a 10 m f capaci- tor is recommended for the charge pump, four 0.47 m f ceramic capaci- tors in parallel can be used. 12) what is the recommended power supply start-up sequence for the adcs? a: it is a recommended practice that the analog supply be established before the digital supply. if separate digital and analog supplies are used, it is further recommended that a diode be placed between them (the cathode of the diode should point to the analog supply). 13) what is the recommended software start-up sequence for the adcs? a: assuming a user is using a 32.768khz crystal for the adcs and is inter- facing them to a micro-controller, the recommended start-up sequence is: 1) put a 500 ms delay in the software code to allow time for the oscillator to start, 2) reset the adcs serial port with the reset serial port initializa- tion routine (i.e. fifteen 0xff hexadecimal commands, followed by one 0xfe hexadecimal command), 3) then reset the adc by setting the rs (reset system) bit in the configuration register. the user needs to remember to return the rs bit back to zero as the adc will remain in reset until the bit is cleared. 14) how can i get the best noise performance from the adcs? a: the adcs noise performance is set for a given output word rate and gain range. to minimize the noises effect on code toggle, use the bipolar mode or increase the reference voltage, as each of these increase the size of an lsb. also, calibrate the adcs with the lowest output word rate set- ting as this minimizes noisy calibrations and use the lowest output word rate as noise performance is best with slower throughputs. 5521pi_3.fm page 6 monday, april 12, 1999 12:03 pm
pi317pp3 apr 99 7 cs5521/22/23/24/28 faqs 15) what advantages do the channel-sequencer and data conversion fifo offer? a: the channel-sequencer permits a user to pre-sequence future conver- sions. up to 16 conversion sequences can be programed and converted. once converted, the data conversion fifo is used to store the conver- sions until the are read by a processor at a later time. 16) what benefit does an evaluation board offer? a: the cdb5521/22/23/24/28 evaluation board saves time and money over prototyping. the preassembled board comes equipped with an 80c51 micro-controller and a 9-pin cable to link the evaluation board to a pc- compatible computer. the evaluation system also includes software which provides easy access to the internal registers of the converter and displays the converters time domain, frequency domain and noise histo- gram performance. 5521pi_3.fm page 7 monday, april 12, 1999 12:03 pm
8 pi317pp3 apr 99 cs5521/22/23/24/28 ordering information ordering information model number bits channels linearity error (max) temperature range package cs5521-ap 16 2 0.003% -40 c to +85 c 20-pin 0.3" skinny plastic dip cs5521-as 16 2 0.003% -40 c to +85 c 20-pin 0.2" plastic ssop cs5522-ap 24 2 0.0015% -40 c to +85 c 20-pin 0.3" skinny plastic dip cs5522-as 24 2 0.0015% -40 c to +85 c 20-pin 0.2" plastic ssop CS5523-ap 16 4 0.003% -40 c to +85 c 24-pin 0.3" skinny plastic dip CS5523-as 16 4 0.003% -40 c to +85 c 24-pin 0.2" plastic ssop cs5524-ap 24 4 0.0015% -40 c to +85 c 24-pin 0.3" skinny plastic dip cs5524-as 24 4 0.0015% -40 c to +85 c 24-pin 0.2" plastic ssop cs5528-ap 24 8 0.0015% -40 c to +85 c 24-pin 0.3" skinny plastic dip cs5528-as 24 8 0.0015% -40 c to +85 c 24-pin 0.2" plastic ssop 5521pi_3.fm page 8 monday, april 12, 1999 12:03 pm
pi317pp3 apr 99 9 cs5521/22/23/24/28 ordering information 5521pi_3.fm page 9 monday, april 12, 1999 12:03 pm
po box 17847 4210 s. industrial drive austin, texas 78744 512.445.7222 / 800.888.5016 fax: 512.445.7581 worldwide web: http://www.cirrus.com 5521pi_3.fm page 10 monday, april 12, 1999 12:03 pm

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